1. Field of the Invention
The present invention relates to a thin film transistor (to be referred to as a TFT hereinafter) formed by stacking thin films, such as a gate electrode, a gate insulating film, a semiconductor, a source electrode, and a drain electrode, on a transparent insulating substrate, and a method of manufacturing the same.
2. Description of the Related Art
Conventional TFTs as switching elements are disclosed in Japanese Utility Model Publication No. 44-5572 (U.S. Ser. No. 132095), Japanese Patent Publication No. 41-8172 (U.S. Ser. No. 344921), and P. K. Weimer, "The TFT--A New Thin-Film Transistor", PROCEEDINGS OF THE IRE, June, 1962. Liquid crystal display panels using such TFTs are disclosed in "A 6.times.6 Inch 20 lines-Per-Inch Liquid Crystal Display Panel", IEEE Transactions on Electron Device, vol. ED-20, No. 11, Nov. 1973 and U.S. Pat. No. 3,840,695.
On the other hand, U.S. Pat. Nos. 3,765,747 and 3,862,360, and Japanese Patent Disclosure (Kokai) Nos. 55-32026, 57-20778, and 58-21784 disclose a technique wherein a MOS transistor is formed on a monocrystalline semiconductor substrate, and the resultant structure is used as one of the substrates of a liquid crystal display panel. However, if liquid crystal panels are constituted by these semiconductor substrates, only reflection type displays can be obtained. In addition, the manufacturing process of such panels are as complex as that of LSIs. Moreover, it Is difficult to obtain a large display panel.
The above-described active matrix liquid crystal panels, therefore, currently use the TFTs as switching elements. The structures of these TFTs can be classified into a coplanar type, an inverted coplanar type, a staggered type, and an inverted staggered type, as disclosed in the article by P. K. Weimer. Of these types, the inverted staggered type TFT can be formed by stacking a plurality of thin films successively in a vacuum. For this reason, the number of manufacturing steps is substantially decreased. As a result, the characteristics of a product are stabilized, and the rate of occurrence of defective transistors is decreased.
FIGS. 1 and 2 show structures of the abovedescribed inverted staggered type TFT and a TFT array obtained by arranging a plurality of such inverted staggered type TFTs on an insulating substrate. Referring to FIGS. 1 and 2, a plurality of TFTs 1 are arranged on transparent insulating substrate 2 in the form of a matrix. Gate electrodes 3 of TFTs 1 are commonly connected through gate line 4 in the row direction. Drain electrodes 5 of TFTs 1 are commonly connected through drain line 6 in the column direction. Source electrode 7 of each TFT 1 is connected to transparent electrode 8 independently formed in an area surrounded by gate and drain lines 4 and 6 (an electrode to which a data signal is supplied will be referred to as a drain electrode hereinafter). More specifically, as shown in FIG. 2, gate electrode 3 consisting of Cr or the like is formed on transparent glass substrate 2, and gate insulating film 9 consisting of silicon oxide or silicon nitride is formed on the upper surface of glass substrate 2 including the upper surface of gate electrode 3. Semiconductor film 10 consisting of amorphous silicon is stacked on gate insulating film 9 above gate electrode 3. Drain and source electrodes 5 and 7 are formed on semiconductor film 10. They are separated from each other by a predetermined distance so as to form channel portion 11. Drain and source electrodes 5 and 7 respectively have contact layers 5a and 7a, and metal layers 5b and 7b, and are electrically connected to semiconductor 10. Source electrode 7 is connected to transparent electrode 8 consisting of Indium-Tin-Oxide (to be referred to as an ITO hereinafter).
In the TFT used for the above-described TFT array, since part of drain electrode 5, drain line 6, and transparent electrode 8 are formed on gate insulating film 9, both the electrodes tend to be short-circuited, and hence the rate of occurrence of defects becomes high. Especially in the TFT array using this TFT, since transparent electrode 8 is formed in a region surrounded by gate and drain lines 4 and 6, short-circuiting tends to occur between transparent electrode 8 and drain line 6.
In order to prevent such short-circuiting, predetermined distance L determined by process and alignment precision in formation of transparent electrode 8 and drain line 6 is formed therebetween. Distance L is normally set to be a large value, e.g., 20 .mu.m or more. Although the formation of such large distance L can prevent the above-described short-circuiting, the area of transparent electrode 8 is reduced. That is, the problem of reduction in effective display area is posed. For example, the opening ratio, i.e., the ratio of the area of transparent electrode 8 to an area for arranging one TFT and one transparent electrode on glass substrate 2 becomes as small as about 50% even if distance L is set to be a minimum value of 20 .mu.m.
As described with reference to Japanese Patent Disclosure (Kokai) No. 55-32026, in the transistor array obtained by arraying MOS transistors using the monocrystalline semiconductor substrate, unevenness of the upper surface of the substrate occurs because of the formation of the transistors. Therefore, in order to flatten the upper surface and form a uniform orientation film, an insulating film is deposited on the transistors, and reflecting electrodes for receiving data signals are formed on the insulating film. According to such a transistor having a MOS structure, since the gate electrode is formed on the semiconductor substrate, an unnecessary electric field is not applied to the channel portion by a data signal supplied to the transparent electrode formed above the channel portion.
In the above-described inverted staggered type TFT, however, since the gate electrode is formed on the substrate, electric fields tend to be applied to the semiconductor film from electrodes other than the gate electrode.
It is, therefore, difficult to obtain a TFT which can be stably operated without causing short-circuiting between the drain electrode and drain line, and the transparent electrode connected to the source electrode, and can be easily manufactured.